Optimized Radar System Reference Design Using a DSP+ARM SoC (TIDEP0060)

For modern radar system developers currently using an FPGA or ASIC to connect to high speed data converters, who need faster time to market with increased performance and significant reduction in cost, power, and size, this reference design includes the first widely available processor integrating a JESD204B interface and Digital Front End (DFE) processing. Connecting to the ADC14X250 and DAC38J84 provides an efficient solution for avionics and defense applications such radar, electronic warfare, compute platforms and transponders.

Возможности

Easy integration of signal processor to data converters over JESD204B Sampling of a single 100MHz channel, when connected to ADC14X250 DFE processing for filtering, down-sampling or up-sampling; FFTC hardware accelerator to offload compute-intensive 2D FFT operations, achieving low latency and high accuracy Wideband sampling with JESD attached signal processing solution including Digital Signal Processor (DSP), ADC and DAC boards, demo software, configuration GUIs and Getting Started Guide A robust demonstration and development platform including three EVMs, a deterministic latency card, schematic, BOM, user guide, benchmarks, software and demos

Файлы

Схемы и диаграммы

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Печатные платы и ПО

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Спецификация (BOM)

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Optimized Radar System Reference Design Using a DSP+ARM SoC TIDEP0060

Используемые компоненты

Производитель: Texas Instruments
Наименование
Производитель
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Изображение
Цена, руб. Наличие
ADC14X250EVM
ADC14X250EVM
Texas Instruments
Арт.: 2084636 ИНФО PDF RD
Доступно: 13 шт.
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ADC14X250 Evaluation Module
ADC14X250EVM
13 шт.
(под заказ)
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условия
поставки
ADC14X250RHBR
ADC14X250RHBR
Texas Instruments
Арт.: 2103224 PDF RD
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ADC14X250RHBR
-
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ADC14X250RHBT
ADC14X250RHBT
Texas Instruments
Арт.: 2103225 PDF RD
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предложений
ADC14X250RHBT
-
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