Minimizing Spurious Outputs Using a Synthesizer with an Integrated VCO and an External PLL Circuit (cn0232)
The circuit shown in Figure 1 uses the ADF4350 synthesizer with an integrated VCO and an external PLL to minimize spurious outputs by isolating the PLL synthesizer circuitry from the VCO circuit.
Devices with integrated PLLs and VCOs may have feed through from the digital PLL circuitry to the VCO, leading to higher spurious levels due to the close proximity of the PLL circuitry to the VCO.
The circuit shown in Figure 1 uses the ADF4350, a fully integrated fractional-N PLL and VCO that can generate frequencies from 137.5 MHz to 4400 MHz, together with the ADF4153 PLL.
In addition to improvements in spurious performance, another possible advantage of using an external PLL is the possibility of increased frequency resolution. For example, if the ADF4157 PLL is selected in place of the ADF4153, the frequency resolution of the PLL can be as fine as 0.7 Hz.
Figure 1. ADF4153 PLL Connected to ADF4350 (Simplified Schematic: All Connections and Decoupling Not Shown)
Схемы и диаграммы
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