Equalization Optimization of a JESD204B Serial Link Reference Design (TIDA-00353)

Employing equalization techniques is an effective way of compensating for channel loss in JESD204B high speed serial interfaces for data converters. This reference design features the ADC16DX370, a dual 16-bit, 370 MSPS analog-to-digital converter (ADC) that utilizes de-emphasis equalization to prepare the 7.4 Gbps serial data for transmission. Configuration allows a user to optimize the de-emphasis setting (DEM) and output voltage swing setting (VOD) of the output driver to inversely match the characteristics of the channel. Experiments demonstrate the reception of a clean data eye over 20” of FR-4 material at the full data rate.


Achieve a high performance JESD204B serial link using low cost PCB materials Understand the limitations of lossy channels and equalization techniques to overcome the limitations Use a formula-based approach to optimizing the equalization features of the ADC16DX370 This reference design is tested and includes an EVM, configuration software and User's Guide


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Equalization Optimization of a JESD204B Serial Link Reference Design TIDA-00353

Используемые компоненты

Производитель: Texas Instruments
SN74AVC4T774PWR SN74AVC4T774PWR Цена, руб. Срок поставки Укажите

4-Bit Dual-Supply Bus Transceiver With Configurable Voltage-Level Shifting and 3-State Outputs 16-TSSOP -40 to 85 ИНФО
53,00 r
от 29 шт. 46,50 q
от 83 шт. 40,00 q
от 180 шт. 36,50 q
На складе: 2204 шт.

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