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Universal Digital Interface to Absolute Position Encoders Reference Design (TIDA-00179)

The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor like Sitara AM437x or Delfino F28379 to run the corresponding master protocol. Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). The TI design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.

Возможности

Universal Hardware to Interface to EnDat 2.2, BiSS, SSI and 4-Wire or 2-Wire HIPERFACE DSL Encoders. Supports All Corresponding Standard Data Rates up to at least 100m Cable Length. 3.3-V Supply Half-Duplex RS485 Transceiver SN65HVD78 with 12kV IEC-ESD and 4kV EFT Eliminates Cost for External ESD Components. Encoder P/S with Wide Input Range (15-60V) Offers Programmable Output Voltage 5.25V or 11V, Compliant to EnDat 2.2, BiSS or HIPERFACE DSL Encoders. OV, UV and Precise Over-Current Limit with Short-Circuit Protection Leveraging TI eFuse Technology with Current Monitor and Fault Indicator. Logic Interface (3.3V I/O) to Host Processors like host processor like Sitara AM437x or Delfino F28379 to run the EnDat 2.2, BiSS, SSI or HIPERFACE DSL Master. Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). Design Exceeds EMC Immunity for ESD, Fast Transient Burst, and Surge and Conducted RF with Levels according to IEC61800-3.

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Universal Digital Interface to Absolute Position Encoders Reference Design TIDA-00179

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