Терраэлектроника

Power Management Reference Design for Xilinx Virtex-6 FPGAs (1.8V @ 2.6A) (PMP5098)

The PMP5098 reference design uses four (4) TPS40400 PMBus synchronous buck controllers to regulate and control the Xilinx Virtex-6™ FPGA rails. The output voltages can be dynamically adjusted within a 400mV range with 4mV steps. Additional PMBus control includes: Fsw, ILIM, SS time, UVLO, Thermal Shutdown, ENABLE, PGOOD, UVP, OVP, and OCP modes. The design is ideal for applications that require having design flexibility for the Virtex 6™ four output voltages through PMBus programming, configuration, and control.

Возможности

AVS Capability- dynamically adjust Vo through PMBUS: 400mV range with 4mV step PMBUS Configurability of the power supply parameters Differential voltage sensing Differential inductor DCR current sensing 200KHz-2MHz prog. fsw, pre-bias start up support Frequency synchronization, and upstream voltage rail tracking

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Схемы и диаграммы

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Тесты и симуляция

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Спецификация (BOM)

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Power Management Reference Design for Xilinx Virtex-6 FPGAs (1.8V @ 2.6A) PMP5098

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