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Применения > > High Efficiency, Power Density 4-Phase 1V/120A PMBus Interface Reference Design for ASIC Processors

High Efficiency, Power Density 4-Phase 1V/120A PMBus Interface Reference Design for ASIC Processors (PMP11312)

The PMP11312 reference design is a 4-phase PMBus converter for high current ASIC core rail regulation. It utilizes TPS53647 4-phase controller for 120A high current rail, which employs DCAP+ control for fast transient response and TI's proprietary AutoBalance for tight steady and dynamic phase-to-phase current balance. TPS53647 drives TI NexFET smart power stages for high power density and efficiency. Optimized layout and improved board stack-up (8-layer, 2oz-copper) achieve higher efficiency and higher power density. PMBus capability and on-board NVM enable easy design, configuration, and customization, with telemetry of output voltage, current, temperature, and power.

Возможности

Compact modular layout in 0.95"x2.3" (24.1mmx58.4mm) High efficiency 91.7% at 1V/120A, 300kHz, 12Vin Excellent thermal performance (53C FET temperature at full load with 200LFM air flow) Combined ripple and transient response around +/-1.7% Full PMBus telemetry of output voltage, current, power and temperature

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High Efficiency, Power Density 4-Phase 1V/120A PMBus Interface Reference Design for ASIC Processors PMP11312

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