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Высоконадежные приложения

Возможности:

    Feature Benefit
    GSM Communications Text messaging and cellular phone connection
    GPRS Communications Packet data communications – images, location information, etc
    GPS Satellite Positioning for easy tracking and Location Based Services

Документация:
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Описание:
Microchip’s 200W DC/DC LLC Resonant Converter Reference Design operates over a wide input voltage range (350 - 420Vdc) with a nominal input of 400V, providing a 12V DC output, while maintaining high-voltage isolation between the primary and secondary. High efficiency is achieved through Zero Voltage Switching (ZVS) on the half-bridge converter and Zero Current Switching (ZCS) on the synchronous rectifier. A synchronous rectifier is implemented over the traditional full wave rectifier for improved efficiency. The DC-DC LLC Resonant Converter Reference Design utilizes Microchip’s digital power conversion dsPIC for unique “adaptive” control of the half-bridge converter and synchronous rectifier.

This reference design is implemented using a single dsPIC33F “GS” digital-power DSCs from Microchip that provides the full digital control of the power conversion and system management functions. As shown in this reference design the dsPIC33F ‘GS’ devices enable designers to easily and cost effectively create products using advanced switching techniques such as LLC that lower switching losses and enable efficiencies as high as 95%. The DC to DC LLC Converter Reference Design is royalty free when used in accordance with the licensing agreement.

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Возможности:

    • Low power consumption at no load
    • Programmable soft-start
    • Voltage, Current, Temperature monitoring & Protection
    • Primary and secondary MOSFET control
    • Full Digital Control

Документация:
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Описание:
Microchip’s Digital Pure Sine Wave Uninterruptible Power Supply (UPS) Reference Design is based on the dsPIC33F “GS” series of digital-power Digital Signal Controllers (DSCs). This reference design demonstrates how digital-power techniques when applied to UPS applications enable easy modifications through software, the use of smaller magnetics, intelligent battery charging, higher efficiency, compact designs, reduction in audible and electrical noise via a purer sine-wave output, USB communication and low-cost overall bill-of-materials. This reference design is Royalty Free. Click here for a list of complete documentation and software & hardware design information.

This reference design is implemented using a single dsPIC33F “GS” digital-power DSCs from Microchip that provides the full digital control of the power conversion and system management functions. As shown in this reference design the dsPIC33F ‘GS’ devices enable designers to easily and cost effectively create products using advanced switching techniques such as LLC that lower switching losses and enable efficiencies as high as 95%. The DC to DC LLC Converter Reference Design is royalty free when used in accordance with the licensing agreement.

The Digital Pure Sine Wave UPS System operates in two modes:

Standby Mode – Operational in the presence of AC line voltage; battery is charged in this mode.
UPS Mode – Operational during power outage; the system switches to a function called inverter to provide power to load. Charge stored in the battery is converted to AC output.

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Возможности:

    • High-frequency design
    • Adjustable Charging current
    • Efficiency of 84%
    • Pure sine wave output with THD <3%
    • Mains to Battery Transfer time < 12 ms
    • Supports Crest Factor of 3:1
    • Minimum Power Factor(Leading/Lagging) of 0.65
    • Fault indications
    • USB Communication with PC
    • LCD front panel

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Описание:
Summary
The PICDEM™ Lab II Development Board is a development and teaching platform for use with 8-bit PIC® microcontrollers (MCUs). At its center, a large prototyping breadboard enables users to easily "experiment" with different values and configurations of analog components for system optimization. Several external connectors allow for user-customizable expansion, while our library of labs and application notes enrich the development experience. The PICDEM Lab II Development Board is also fully compatible with our latest software development environment.

Embedded Development Powerhouse
The original PICDEM Lab Development Board has remained one of the most popular development tools for PIC MCUs since its introduction. Microchip has taken this concept and expanded it for 21st century embedded development. The PICDEM Lab II Development Board supports any 8-bit PIC microcontroller (6-, 8-, 14-, 18-, 20-, 28- and 40-pin footprints), and provides an expansive array of connections for programming, I/O, analog and communications interfaces. The PICDEM Lab II Development Board will be a valuable resource to engineers across a broad spectrum of specialties, from analog designers looking to explore the power and flexibility of MCU-based systems to engineering professors seeking a flexible and relevant teaching tool that they can add to their curricula.

Hardware Flexibility Enables Experimentation
In keeping with the original, the PICDEM Lab II Development Board was designed to give you a simple development experience without the hassle of and expense of building a custom PCB in the early stages of your project. You can design a system with one or several PIC MCUs, since power and programming connections are replicated across all of the available sockets. Off- chip connections can be made in any manner, and the expansive breadboard provides a convenient area to add analog signal conditioning and drive components to a design. Three separate power supplies give the capability to provide fixed or variable voltage to a system. With several industry-standard interfaces in addition to a system of configurable conntectors, the off-board expansion possibilities are abundant.


Please visit our PICDEM Lab II Design Center for more information
Возможности:

    Please visit our PICDEM Lab II Design Center for more information

    • Supports all 8-bit PIC MCUs from 6 to 40 pins
    • Programming headers and power connections for all MCU sockets
    • Three individual power supplies
    • 5V, 3.3V, variable (1.5-4.5V)
    • Large breadboard area for external analog and sensor connections
    • External connections for industry-standard communications and expansion interfaces
    • Lab hardware and documentation for four labs included in the box
    • RS232 and Bluetooth® Low Energy interfaces
    Connection Points
    • Power Distribution Connectors - Supply power to other parts of your design using one of the PICDEM Lab II Development Board's on-board power supplies.
    • USB to I2C™ - Use the USB interface for diagnostic or control interfaces without worrying about the specifics of USB communication. USB to I2C conversion is handled automatically.
    • MikroElectronika Click Board Support - Two sockets give you access to nearly 100 inexpensive add-on boards, with capabilities ranging from GPS to alcohol sensing.
    • LCD Module Connector - A simple 16-pin connector supports a number of standard segment LCD module interfaces.
    • 20-pin Add-On Board Connector - Design your own add-on boards for sensor connectivity or motor drive, and connect them with this simple interface.

Документация:
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Описание:
Showcasing PIC24F “GC” Family with High Resolution Analog, LCD, and USB

Visit theeXtreme Low Powerdesign center

Возможности:

    • 16-bit Sigma-Delta Analog to Digital Converter
    • 12-bit Pipeline 10 Msps Analog to Digital Converter
    • 10-bit 1 Msps Digital to Analog Converter (2)
    • Operational Amplifiers (2)
    • Comparators (3)
    • Voltage References (3)
    • Charge-Time Measurement Unit (CTMU)


    Included demos:

    • Analog 16-bit ADC – precision measurement and display to LCD
    • Analog 12-bit ADC – measure sensor data from Light Sensor, POT, Port Pin and stream via USB
    • Analog 10-bit DAC – generate audio tones
    • LCD Text – Left/Right Scrolling & menuing via touch button control
    • LCD Graphics – Bar graph indicator, Sine Wave
    • LCD Clock – Time, Set Time functions
    • LCD Test – Cycles through Icons and displays associated text
    • Microphone – 12-bit ADC measurement, display with bar graph on LCD
    • Temperature – Display current temperature in °C or °F
    • Sleep – Power down and display time

Документация:
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Описание:
The MPLAB Starter Kit for PIC24H MCUs is a complete hardware and software kit for exploring the power of PIC24H family of MCUs for multi-tasking needs. With a built-in debugger on the board, simply install the software and connect the USB cable to the PC. Start up MPLAB IDE and gain full control. Run the accelerometer based sample programs and check out the interaction of the accelerometer and the switches with the MCU on the visual display and listen to the speech playback. Connect your own analog sensor for sensor signal processing. Download and test your own applications.
The starter kit features PIC24HJ128GP504 MCU with 128 KB Flash and 8 KB RAM as the computational unit. A tri-axial accelerometer is provided for acceleration detection. The starter kit also showcases a low cost audio playback with an on-board speaker and an OLED display running Microchip Graphics library. A separate signal conditioning circuit is provided to plug-in a wide range of sensors.
Click here to see a video.
Возможности:

    • Board includes integrated debugger / programmer
    • USB powered
    • PIC24HJ128GP504 MCU with 128 KB Flash and 8 KB RAM
    • Features a tri-axial analog accelerometer, 128x64 OLED display, on-board speaker
    • Low cost speech play back of G.711 compressed speech
    • Visual display on OLED display using Microchip Graphics library
    • Switches for application utility
    • Separate analog conditioning circuitry to plug-in wide range of sensors for sensor signal processing
    • CD contains MPLAB IDE with full editor, programmer and debugger; MPLAB C Compiler; code examples and user’s guide

Документация:
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Описание:
The MPLAB Starter Kit for Digital Powerkit uses the dsPIC33EP64GS502 DSC to implement a buck converter and a boost converter. It is a digitally controlled power supply board that consists of one independent DC/DC synchronous Buck converter and one independent DC/DC Boost converter.Each convertercan drive its on-board MOSFETcontrolled resistive load or an external load. The board hasan LCD display for voltage, current, temperature and faultconditions, and an integrated programmer/debugger, allpowered by the included 9 V power supply.



Возможности:

    • dsPIC33EP64GS502 – Low-cost 16-bit digital power conversion DSC
    • One independent DC/DC synchronous Buck converter
    • One independent DC/DC Boost converter.
    • LCD display for voltage, current, temperature and fault conditions
    • On-board In-Circuit Debugger /Programmer via USB
    • On-board programmable resistive loads of up to 3W (0.5W, 1.25W, 1.25W)
    • Hardware slope compensation for peak current mode implementations
    • On-board temperature sensor
    • Compact Design – 4” x 2.5” board
    • Powered via 9V power supply (included)

Документация:
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Описание:
The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.

Возможности:

Provides all the power supply rails needed for a Xilinx® Zynq® 7000 series (XC7Z015) Design optimized to support a 12V input On board power up and power down sequencing Supports DDR3 memory device Module design for ease of use

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Документация:
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Описание:
The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.

Возможности:

Complete power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA Ease of design and high density with SIMPLE SWITCHER® power modules Simple and flexible power sequencing with LM3880 Compact solution size, 1.4 x 1.7 inch (36 x 43 mm) Provide DDR3 termination power with LP2998 The reference board is tested, and the test report and design files are included

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Документация:
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  • BOM
  • Тестирование
Описание:
The PMP11225 reference design implements two small-footprint integrated FET synchronous buck converters. Optimized for small size, each converter operates at 1.3MHz and occupies an area of only 7mm x 10mm.
Возможности:

Very small PCB area of only 7mm x 10mm Good efficiency (90% with 1A load at 10.8Vin) Low output ripple voltage (<20mVpp)

Документация:
  • Схемотехника
  • BOM
Описание:

Данное типовое решение предназначено для обеспечения питанием AVS ядра в Keystone Multicore DSP, в основном серии C66x. В серии C66x используется технология Smart Reflex, что позволяет DSP управлять собственным питанием. Данная возможность реализована с использованием синхронного понижающего преобразователя (TPS56121) с управлением выходным напряжением через LM10010. LM10010 принимает 6-битный сигнал управления от DSP и подстраивает выходное напряжение TPS56121, который питает DSP.

Документация:
  • Схемотехника
  • BOM
  • Тестирование
Описание:

PMP7804 - референс дизайн обеспечивает все шины питания, необходимые для питания ПЛИС Xilinx® KINTEX® 7. Дизайн использует модули питания SimpleSwitcher наряду с низковольтными синхронными понижающими регуляторами LM2121x для "простоты использования" и сокращения сроков разработки. Такой дизайн оптимизирован для питания 12 В.

 

Возможности:

  • Обеспечивает все необходимые шины питания для ПЛИС Xilinx® Kintex® 7 серии;
  • Дизайн оптимизирован для входного напряжения питания 12 В;
  • Модульный дизайн для простоты использования.

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Документация:
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  • Тестирование
Описание:
Xilinx chose TI as the power solution vendor to power Virtex 7 FPGA (along with other analog solution from TI). You will find Schematic and bill of material fo the solution Xilinx used on the development kits.
Документация:
  • Схемотехника
  • BOM
  • Топология платы
  • Тестирование
Описание:

В системе управления питанием Artix7 используются силовые модули, линейные регуляторы и контроллеры PMBus для обеспечения основным и вспомогательным питанием всех узлов ПЛИС, включая DDR память. Графический интерфейс пользователя позволяет отслеживать напряжения и токи на шинах питания.

Возможности:

  • Решение оптимизировано для работы от источника питания 12 В;
  • 2 контроллера PMBus управляют в общей сложности 9 линиями питания;
  • Модули питания поддерживают до 6 А выходного тока;
  • Трансиверы питаются от LDO с низким уровнем шума;
  • Синхронная динамическая энергозависимая DDR память с произвольным доступом позволяет хранить пользовательские код и данные;
  • Протестированное решение.

Документация:
  • Схемотехника
  • BOM
  • Топология платы
  • Тестирование
Описание:

Компания Xilinx выбрала TI как поставщика решений питания для Kintex 7 FPGA (наряду с другими аналоговыми решениями от TI). Вы найдете схемы и BOM для решения Xilinx с использованием наборов разработчика.

Документация:
  • Схемотехника
  • BOM
  • Топология платы
  • Тестирование
Описание:
The PMP8372 design is optimized for small size and uses the TPS84250 step-down power module on the top- side with the TPS84259 negative output power module on the bottom-side to implement both positive and negative output voltages from a 12V/24V source. The output voltages can be adjusted from +/-3V to +/-15V with resistor changes. The design is capable of 1-A outputs. The positive-input TPS7A4700 LDO and negative-input TPS7A3301 LDO are included for a low noise, high PSRR solution that is ideal for powering bipolar amplifiers, data converters, or other noise-sensitive analog circuitry.

Возможности:

Wide input Voltage range from 7V to 40V Dual output voltages can be adjusted from +/-3V to +/-15V, which are capable of 1A outputs High PSRR LDOs: Positive output 80dB PSRR @ 100Hz and Negative output 72dB PSRR @ 100KHz Positive output noise: 7μVrms (10Hz, 100kHz), Negative output noise: 30μVrms (10Hz, 100kHz) Ultra Low noise for powering bipolar amplifier, data converter, or other noise-sensitive analog circuitry

Документация:
  • Схемотехника
  • BOM
  • Тестирование
Описание:
The PMP8709 reference design shows a SEPIC power supply, which converts input voltages between 8V and 32V to an output voltage of 13.5V. The maximum load current is 2A. Output capacitors are ceramic only.

Возможности:

Built and tested Only ceramic capacitors at the output Wide input voltage range Optional UVLO

Документация:
  • Схемотехника
  • BOM
Описание:
The TPS50601-SP MINI POL converter is designed to demonstrate reduced footprint that can be achieved using a single sided layout. The footprint can be further reduced if configured in dual sided layout. Reference Schematic and BOM are attached for the Mini POL with recommended space qualified components. Output voltage is configured to be 1.2V. The TPS50601-SP DC/DC converter is designed to provide up to a 6-A output in single phase operation (TPS50601SPEVM-S) and up to 12 A in dual phase operation (TPS50601SPEVM-D), when each phase is configured to provide 6-A per phase. TPS50601-SP will operate with switching frequency of 100-kHz to 1-MHz range. For the TPS50601SPEVM-MINI, 250 kHz was selected to optimize size and efficiency of EVM. The high-side and low-side MOSFETs are incorporated inside the TPS50601-SP package along with the gate drive circuitry. The low drain-to-source on-resistance of the MOSFET allows the TPS50601-SP to achieve high efficiencies and helps keep the junction temperature low at high output currents. The compensation components are external to the integrated circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS50601-SP provides adjustable soft start, tracking, and undervoltage lockout inputs.

Возможности:

Integrated 55-mΩ/50-mΩ MOSFETs Split Power Rail: 1.6 V to 6.3 V on PVIN Power Rail: 3 V to 6.3 V on VIN SEL Latchup Immune to LET = 85 MeV/mg-cm2 Total Dose (TID) tolerance = 100kRad (Si) Flexible Switching Frequency Options: – 100-kHz to 1-MHz Adjustable Internal Oscillator– External Sync Capability from 100 kHz to 1 MHz– Sync Pin Can Be Configured as a 500-kHz Output for Master/Slave Applications 0.795-V ±1.258% Voltage Reference at 25°C Monotonic Start-Up into Pre-Biased Outputs Adjustable Slow Start and Power Sequencing Power Good Output Monitor for Undervoltage and Overvoltage Adjustable Input Undervoltage Lockout For SWIFT™ Documentation, visit http://www.ti.com/swift TPS50601-SP available in Military (–55°C to 125°C) Temperature Range (1) (1) Custom temperature ranges available

Документация:
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  • BOM
  • Тестирование
Описание:
PMP9335 is designed for Xilinx Zynq FPGA applications utilizing the TPS84A20 and TPS84320. This design uses an external timer to synchronize the switching frequency to 300 kHz. It also employs a controlled power up and power down sequence.

Возможности:

Designed for Xilinx Zynq FPGA applications Compact solution and easy-to-use design with TPS84A20 and TPS84320 buck regulator modules Controlled power up and power down sequence To be used as a “plug in” module, the use of extra bulk capacitance on external pcb is assumed

Документация:
  • Схемотехника
  • BOM
Описание:
The PMP9353 reference design is a complete power solution for Altera Cyclone V SoC devices. This design uses several LMZ3 series modules , two LDOs, and a DDR termination regulator to provide all the necessary rails to power the SoC chip. This design also shows correct power-up sequencing.

Возможности:

Provides all the power rails needed to power an Altera Cyclone V SoC Design optimized to support a 12V input Ease of use with integrated LMZ3 series power modules Optimum combination of switching regulators and LDOs provides the best power distrubution tree Supports DDR3 memory device This design is tested and ready to power up an Cyclone V SoC

Документация:
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  • BOM
  • Тестирование
Описание:

Базовый проект PMP9357 представляет собой полноценное решение питания для FPGA семейства Arria V от Altera. В данном проекте для организации всех необходимых шин питания для FPGA используются несколько синхронных понижающих преобразователей TPS54620, LDO, а также терминирующий регулятор DDR. Для правильного секвенсирования питания используется секвенсер/ монитор питания UCD90120A, которым можно управлять по I2C.

Данный базовый проект имеет характер аппаратного решения.

Возможности:

  • Имеет все необходимые шины питания для FPGA семейства Arria V от Altera
  • Проект оптимизирован для поддержки входа 5 В
  • Крайне высокая плотность установки компонентов на печатной плате, что позволяет уменьшить её габариты
  • Оптимальное сочетание импульсных регуляторов и LDO позволяет добиться наилучшего распределения питания
  • Поддерживает устройство памяти DDR3
  • Данный проект протестирован и готов к работе по организации питания для FPGA семейства Arria V

Документация:
  • Схемотехника
  • BOM
  • Тестирование
Описание:
The electrical performance of data converters depends on the cleanliness of their supply voltages. Linear regulators (LDOs) are commonly used but have low efficiency and high power loss, which is unsuitable for portable applications. Using a switch mode power supply (SMPS) instead, such as the TPS62231 and TPS62237, is a cost-effective and efficient power supply solution. Such a solution does not degrade the performance of the 12-bit ADS540x family of analog to digital converters (ADCs) and does not waste excessive power. The test report shows the Signal to Noise Ratio (SNR) and Spurious-Free Dynamic Range (SFDR) comparisons between the two power supplies, which demonstrate the same performance.

Возможности:

Efficiency increase from 47% to 83% Input current reduced from 620 mA to 350 mA No linear regulators (LDOs) required to cleanly power ADC 12-bit performance maintained Smaller DC/DC solution size than LDOs Supports 5-V input

Документация:
  • Схемотехника
  • BOM
  • Тестирование
Описание:
This reference design delivers a low cost LCD bias power circuit using the boost converter IC TPS61085. The solution provides all four voltages required by the thin film transistor (TFT) LCD display. The TPS61085 boost converter generates the AVDD voltage. Two external charge pump circuits provide the positive VGH and negative VGL bias voltage for the TFT. One external op-amp LM7321MF acts as a high current buffer; it provides the VCOM voltage for the TFT backplane.

Возможности:

Discrete solution for LCD bias power Low cost and small size A high current buffer is also provided This circuit has been tested on a reference design board

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Документация:
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Описание:

Эта конструкция предназначена для питания небольших систем, подключенных к аудиоразъему смартфона. Решение содержит зарядную накачку и повышающий преобразователь. Зарядная накачка используется как фильтр входного переменного тока в напряжение постоянного тока, а повышающий преобразователь TPS610981 с ультранизким потреблением тока используется для генерирования стабильных 3,3 В.

 

Возможности:

  • Низкое входное напряжение;
  • Высокая эффективность повышающего преобразователя;
  • Небольшие размеры.

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Документация:
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  • Топология платы
Описание:
Differential Headphone amplifiers require positive and negative voltages. In this reference design, both voltages are generated from a single input voltage with an all integrated split-rail converter. It only requires one inductor and a minimal amount of external components to achieve a high efficiency power supply that keeps the distortion of the system very low. End users benefit from High Fidelity audio performances with longer playback time in their mobile application.

Возможности:

90% Peak Efficiency Tiny solution size: 5.9x6.9 mm Low Distortion: THD+N < 0.00075% Programmable outputs Small BOM — only 7 external components required This circuit design is tested. All necessary software, a Test Report and a Design File are included.

Документация:
  • Схемотехника
  • BOM
Описание:
This reference design provides an easy method to evaluate the power, and features of SMPS dsPIC® Digital Signal Controllers in high density quarter brick DC-DC converters for intermediate bus architectures(IBA). This reference design is implemented using a single dsPIC33F “GS” digital-power DSCs from Microchip that provides the full digital control of the power conversion and system management functions. As shown in this reference design the dsPIC33F ‘GS’ devices enable designers to easily and cost effectively create products using advanced switching techniques such as Phase Shift Full Bridge (PSFB) topology that lower switching losses and enable efficiencies as high as 94%. The reference design also supports the Full Bridge topology through minor hardware modifications. The Quarter brick DC to DC Converter Reference Design is royalty free when used in accordance with the licensing agreement.

This reference design works with telecom input range 36V – 76V DC and provides 12V with 200W power. Designed with planar magnetics, this reference design implements various non-linear techniques, which improves the performance and efficiency.

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This reference designs hardware is not currently available for purchase. You can request a demonstration. Please contact local sales office in your geography to request a demonstration.
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Возможности:

    • Primary and Secondary MOSFET control
    • Active Current Share
    • Remote ON/OFF
    • Programmable soft start
    • Controlled Fall time
    • Voltage, Current, Temperature monitoring & Protection
    • Configurable output voltage
    • Full Digital Control
    • Supports both Full Bridge and Phase Shifted Full Bridge topologies

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Описание:
This reference design provides an easy method to evaluate the power, and features of SMPS dsPIC® Digital Signal Controllers for high wattage AC - DC conversion application. Discover the many benefits of digital power control implementation in this reference design. The SMPS AC - DC Reference Design unit works with universal input voltage range, and produces multiple DC outputs. The design is based on a modular structure, which features three major power stages; the input stage, intermediate stage and the third stage, a Point of Load. The input stage is a PFC Boost Converter, the intermediate stage is a Phase-Shifted Zero Voltage Transition (ZVT) Converter, which includes ZVT Full Bridge Converter and Synchronous Rectification, and the third stage is Single-phase and Multi-phase Buck Converters. This reference design uses two dsPIC33F16GS504 devices; one used for the PFC Boost Converter and ZVT Full Bridge Converter, while the other dsPIC® DSC is used for Single-phase and Multi-phase Buck Converters.


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Возможности:

    • Primary and Secondary MOSFET control
    • Operates at universal input voltage (85-265Vac, 45-65Hz)
    • Operates up to 300W sustained output
    • Full Load operation on 3.3V and 5V outputs when loaded individually and/or simultaneously:
      • 3.3V output @ 56A
      • 5V output @ 23A
    • Power Factor Performance of 0.99 at full load (110Vac/220Vac)
    • Fault Indication and Protection
    • Excellent Dynamic Load Performance and Output Sequencing
    • Separate boards, one for digital signals (Signal Board) and the other for the Power stages (Power Board)
    • Signal Board has two dsPIC33F16GS504 devices controlling different power stages
    • MPLAB® ICD 2 or REAL ICE support

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Описание:
Using the OPA615 high bandwidth, DC restoration circuit, this reference design provides a high bandwidth, high precision sample & hold circuit for various applications. Supported by a full scale design guide, the circuit can be easily adjusted for a given application.

Возможности:

Up to 320MHz bandwidth +/-5V supply voltage, comparator output voltage swing +/-3.5V, approx. 14mA max. Iq Droop rate as low as 0.17mV/µs for a 100pF hold capacitor Only 40fC charge injection 100dB Sample and Hold feedthrough rejection This reference design has been lab tested and is supported with design files and a comprehensive design guide

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This reference design, using bq24300 and bq24304, is a highly integrated design that provides protection to Li-ion batteries from failures of the charging circuit. The IC continuously monitors the input voltage, the input current, and the battery voltage. The design operates like a linear regulator: for voltages up to the Input Overvoltage threshold, the output is held at 5.5V (bq24300), 5.0V (bq24305) or 4.5V (bq24304). In case of an input overvoltage condition, if the overvoltage condition persists for more than a few microseconds, the IC solution removes power from the charging circuit by turning off an internal switch. In the case of an overcurrent condition, it limits the current to a safe value for a blanking duration before turning the switch off. Additionally, the IC solution also monitors its own die temperature and switches off if it becomes too hot. The reference design also offers optional protection against reverse voltage at the input with an external P-channel MOSFET.

Возможности:

# Series Cells: 1S Max Input Volts: 26V Max Charge Current: 200mA Communication: Standalone

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bq24195 and bq24195L are fully integrated 4.5A charging / 2.1A boost and 2.5A charging / 1A boost for power bank applications. TIDA-00036 is to demonstrate bq24195 and bq24195L single chip solution for fast charging, synchronous boost on-the-go (OTG) operation with high efficiency and low BOM cost.

Возможности:

Fast charge: up to 4.5A (bq24195)/ 2.5A (bq24195L) charging current to support high capacity battery pack Battery boost operation: long battery run time with 90% OTG efficiency Input voltage dynamic power management to support third party adapters Enable compact 2.1A or 1A power bank design with Integrated FETs and shared buck/boost inductor D+/D- USB detection and compatible to USB BC1.2

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Using the LMH6629 and OPA684 op amps, this reference design deals with the difficulties and limitations of developing very high gain, multistage amplifier circuits. Supported by a full scale application report including theory, simulations, board design and evaluation, this design can be easily adjusted for a given application.

Возможности:

High Voltage Gain - up to 120,000 V/V High Bandwidth - Flat Band 100 kHz - 4 MHz @ 120,000 V/V Low Supply Operation (+/-2.5 V) Low Component Count This reference design has been lab tested and is supported with design files and an application report

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Референс дизайн, и связанный с ним код Verilog, может быть исользован в качестве отправной точки для взаимодействия ПЛИС Altera c высокоскоростными LVDS интерфейсами аналого-цифровых и цифро-аналоговых преобразователей.

 

Возможности:

  • Этот дизайн представляет собой исключительно прошивку и детельно обсуждается в целях понимания;
  • Пример кода Verilog является простой отправной точкой для высокоскоростных решений на основе ПЛИС;
  • Дизайн легко распространяется на другие высокоскоростные преобразователи данных TI;
  • АЦП и ЦАП разделены между собой на тот случай, если требуется только одно решение;
  • Временные ограничения интерфейса подробно обсуждаются для АЦП и ЦАП;
  • Прошивка протестирована с помощью доступных оценочных плат TI.

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For applications where there are bit errors and resulting sample errors (also called sparkle codes, word errors, or code errors), the ability to measure the Error rates caused by these bit errors is important. This FPGA firmware based application note proposes a method to accurately measure these errors over an indefinite time and provides an example of how this measurement can be done using a simple FPGA platform. Code is available on request for the two examples described in the application note.

Возможности:

Understand how Error Rates are specified and what these specifications mean Outline new approach to measuring the sample errors over an indefinite time period to measure the true error rate of an ADC Provide customers the ability to make bit error measurements on their bench under different conditions Firmware is available for low cost FPGA platfrom TI along with simple GUI to monitor the error rates over time

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Описание:
This reference design is a guide to the schematics and layout for the system designer using a GSPS ADC in their system. Use this reference design along with the datasheet — the datasheet is always the final authority. Also, the ADC1xDxxxx(RF)RB Reference Board provides a useful reference design. All design source files for the Reference Board as well as the CAD/CAE symbols for the ADC are available on the product web page or TI-Designs for download. For the purpose of this document, ADC or GSPS ADC refers to the ADC12D1800RF, ADC12D1600RF, ADC12D1000RF, ADC12D800RF, ADC12D500RF, ADC12D1800, ADC12D1600, ADC12D1000, ADC10D1500, ADC10D1000, ADC12D1600QML, and ADC10D1000QML.

Возможности:

Analog Input, clock input and Power design issues are discussed Layout concerns on synchronisation of multiple devices Understand the key care abouts of GSPS ADC schematic and layout design Examples are provided in the form of the design layout files

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The TSW308x is an example design of a wideband digital to RF transmit solution capable of generating 600 MHz of contiguous RF spectrum. The system provides a reference on how to use the DAC34x8x, TRF3705 IQ modulator and LMK0480x to achieve this. This reference EVM coupled with a pattern generator such as the TSW1400EVM can be used to arbitrarily generate narrow band and wideband signals at RF. Examples of configurations to generate standards compliant WCDMA test signals are provided.

Возможности:

Complete Digital to RF transmit solution Up to 600MHz of contiguous signal bandwidth RF signal synthesis from 300MHz to 4GHz On board RF Amp and Attenuator Easy evaluation platform with TSW1400 and HSDC Pro

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The TSW1265EVM is an example design of a wideband RF to digital dual receiver solution capable of digitizing up to 125MHz of spectrum. The system provides a reference on how to use the ADS4249, LMH6521, LMK0480x, and a dual mixer to achieve this. This reference EVEM coupled with a capture card such as the TSW1400 can be used to capture and analyze narrow band and wideband signals. Instructions are provided on how to change the LO and IF frequencies for different application needs. The TIDA-00073 was implemented with hardware from the TSW1265EVM.

Возможности:

Complete RF to digital wideband receiver solution Up to 125MHz of contiguous signal bandwidth RF Input from 1700M to 2200M (mixer dependent - may be swapped within mixer family) On board DVGA for gain control Easy evaluation platform with TSW1400 and HSDC Pro analysis software

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This is a wideband complex-receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain is ideal for high intermediate-frequency (IF) complex-feedback applications and contains a complex demodulator, TI’s LMH6521 dual-channel DVGA and ADS5402 12-bit 800-MSPS dual-channel ADC. By modifying the onboard filter components, the signal chain is configurable for a variety of frequency plans. The EVM also includes TI’s LMK04808 dual-PLL clock jitter cleaner and generator to provide an onboard low-noise clocking solution. The LMH6521 DVGA gain is controlled through the GUI or alternatively through the high speed connector with an FPGA.

Возможности:

Complete RF to digital complex wideband receiver solution Up to 800MHz of contiguous spectrum can be sampled Default configuration of RF input from 1800M to 2400M, options for 700M to 3GHz Onboard DVGA for gain control Easy evaluation platform with TSW1400 and HSDC Pro analysis software

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Описание:
This design shows how to use an active interface with the current sink output of the DAC5682Z - typical applications for this include front ends for arbitrary waveform generators. The EVM includes the DAC5682Z for digital-to-analog conversion, an OPA695 to demonstrate an active interface implementation using a wide bandwidth operational amplifier and a THS3091 and THS3095 to showcase an operational amplifier with large voltage swing. Also included on board are a CDCM7005, VCXO and Reference for clock generation, and linear regulators for voltage regulation. Communication to the EVM is accomplished via a USB interface and GUI software.

Возможности:

Example of a high performance arbitrary waveform generator front end Wideband signal generation using DAC5682z Provide 1 wideband high performance output capable of driving 50 ohm loads using OPA695 Provide a high voltage output using the THS3095 with a maximum of 30Vpp Easy evaluation platform using TSW1400 and HSDC Pro pattern generator software

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Описание:
The analog interface circuits in this reference design are often used between current-source based digital-to analog converters (DAC) and quadrature modulators. While the DAC348x is used as an example of a TI high-speed DAC, the circuits can be applied to other current-source based converters with slight modifications. The DAC348x and TRF3705 analog interface are populated by default on the TSW308xEVMs. Both the DAC348x and TRF3705 are designed with the same DC bias and AC swing specification to provide a seamless interface. Other circuit topologies are described to account for other DC bias and AC swing specifications. By accounting the correct DC bias and proper AC swing, system designers can apply these circuits based on their application needs in order to achieve optimal performance.

Возможности:

A breakdown of the interface on the TSW308x is explained to show the direct connection between the DAC3484 and TRF3705 General Design equations of current source DACs with IQ modulators are provided and explained TINA spice models are provided for different interface networks for DC, AC, and filtered interfaces to meet customer needs

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Описание:
This reference design shows the ability of the high-speed amplifier, LMH6554, to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both AC and DC coupled applications while interfaced to the ADS4449 quad, 250-MSPS, 14-bit ADC. Various options for common-mode voltages, power supplies, and interfaces are discussed and measured to meet the requirements of a variety of applications. Anti-aliasing filter examples are shown along with the performance improvements that they provide.

Возможности:

High-speed single-ended to differential conversion while maintain excellent performance System performance results for LMH6554 driving ADS4449 SFDR > 82 dBFs, SNR > 71 dBFS in first Nyquist zone SFDR > 80 dBFs, SNR > 68 dBFS in second Nyquist zone Examples of both AC and DC coupled interfaces Demonstrates anti-aliasing filter design and performance gains Amplifier power supply design considerations for best performance are discussed

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This reference design shows the ability of the high-speed amplifier, THS4509 to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both AC and DC coupled applications while interfaced to the ADS4449 quad, 250-MSPS, 14-bit ADC. Various options for common-mode voltages, power supplies, and interfaces are discussed and measured to meet the requirements of a variety of applications. Anti-aliasing filter examples are shown along with the performance improvements that they provide.

Возможности:

High-speed single-ended to differential conversion while maintain excellent performance System performance results for THS4509 driving ADS4449 -SFDR > 77 dBFs, SNR > 71 dBFS in first Nyquist zone -SFDR > 69 dBFs, SNR > 67 dBFS in second Nyquist zone Examples of both AC and DC coupled interfaces Demonstrates anti-aliasing filter design and performance gains Amplifier power supply design considerations for best performance are discussed

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Референс дизайн TIDA-00095 обеспечивает законченное решение для измерения и обработки температуры с 2-х, 3-х и 4-х проводного резистивного детектора температуры и передачи показаний по токовой петле 4…20 мА. Решение может быть использовано в приложениях обработки измерений в промышленной автоматизации, полевых передатчиках и автоматизации зданий. При ошибке измерения температуры менее чем 0,017 °C в диапазоне температур -200…+850°C, сверхнизким потреблением 1,4 мА (включая ток через резисторный датчик температуры) и соответствие IEC61000, этот дизайн значительно уменьшает время проектирования и разработки высокоточных систем передачи температуры. Он также адресует системный уровень калибровки смещения и усиления, которые могут быть использованы для улучшения точности АЦП и ЦАП, а также осуществлять линейную интерполяцию для адресации нелинейного элемента (резистивного термодетектора).

 

Возможности:

  • Совместимость 2-,3- и 4-проводными RTD датчиками;
  • Низкое энергопотребление 1,4 мА (включая ток через  RTD) делает дизайн идеальным для питания от токовой петли;
  • Выходной сигнал – токовая петля 4…20 мА с разрешением 0,25 мкА;
  • Максимальная ошибка измерения: 0,11°C в диапазоне -200…+200°C и 0,17°C в диапазоне -200…+850°C;
  • Соответствие IEC61000-4-2 по ESD: воздушный пробой ±8 кВ класс А, пробой при контакте ±4 кВ класс А;
  • Соответствие IEC61000-4-4 по EFT: ±2 кВ класс А.

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This design is intended to help the system designer in understanding tradeoffs and optimizing implementation for driving the Giga-Sample-Per-Second ADC with balun configurations for wideband applications. The tradeoffs considered include balun construction, insertion loss, dynamic performance, configurability, and ease of implementation. Topology and layout play a critical role in optimizing system performance, which is why these designs can help to reduce designs cycles.

Возможности:

Simplifies system design Clarifies ADC operational modes Measured system performance Uses variety of wideband baluns Shows tradeoffs by mode Recommends optimized layout

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Система состоит из микроконтроллера MSP430, драйвера двигателя DRV8837 и коллекторного двигателя 12 В. Она подходит для разработки устройств, требующих 10300 оборотов в минуту без нагрузки.

Модуль очень компактный – всего 19х33 мм, без учета размеров двигателя. Диапазон входных напряжений питания двигателя – 1,8..11 В, максимальный ток 1,8 А. Несколько вариантов конфигурации модуля позволяют регулировать скорость вращения шпинделя, изменять направление вращения и отключать подачу питания. Модуль имеет встроенную защиту от короткого замыкания, пробоя, пониженного напряжения и перегрева.

Возможности:

  • Компактная конструкция системы: 19x33 мм;
  • Интегрированная поддержка мощных полевых транзисторов (power FETs) 1.8..11 В, 1.8 А;
  • Скорость вращения двигателя легко регулируется с помощью ШИМ интерфейса (IN/IN);
  • Низкое сопротивление Rdson MOSFET - всего 280 мОм;
  • Встроенная защита от короткого замыкания, пробоя, пониженного напряжения и перегрева.

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JESD204B links are the latest trend in data-converter digital interfaces. These links take advantage of high-speed serial-digital technology to offer many compelling benefits including improved channel densities. This reference design addresses one of the challenges of adopting the new interface: understanding and designing the link latency. An example achieves deterministic latency and determines the link latency of a system containing the Texas Instruments LM97937 ADC and Xilinx Kintex 7 FPGA.

Возможности:

Guarantee deterministic latency across the JESD204B link Understand the tradeoff between link latency and tolerance to link delay variation Use a formulaic and procedure-based approach to design the link latency Implement a JESD204B link using Texas Instruments' ADC16DX370 or LM97937 ADC and a Xilinx Kintex 7 FPGA

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Единственной целью данного типового решения является детальная демонстрация способа построения простого и надежного аналогового интерфейса для точного измерения температуры термопарой. В решении TIDA-00168 пошагово рассматриваются теория, эксплуатация и возможные сложности применения датчиков данного типа. Кроме того, данное решение рассматривает такие вопросы, как анализ ошибок измерений, необходимость применения фильтра для защиты от наложения спектра, компенсация холодного спая, методы линеаризации данных с датчика, а так же конструктивные особенности печатной платы.

Возможности:

  • Вход сенсора: термопара K-Типа
  • Диапазон температур термопары от –200°C до 1372°C
  • Точность измерения: 0.02ºC
  • Компенсация холодного спая
  • Возможность применения резистивного или встроенного в ADS1220 датчика температуры для компенсации холодного спая
  • Разработано в соответствии со стандартами IEC61000-4
  • Диапазон рабочих температур от  –40°C до 85°C

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TIDA-00170 – промышленный контроллер модулей аналоговых входов и выходов. В данном решении реализовано 4 аналоговых входа и 2 аналоговых выхода. Модуль может измерять все стандартные промышленные напряжения до ±10 В и токи до 24 мА. На оба аналоговых выхода может выводиться напряжение до ±10 В или ток до 24 мА.

Данное типовое решение протестировано на соответствие стандарту IEC61000-4 (EFT, ESD)  и содержит схему защиты. Как показывают тесты, схема защиты не оказывает негативного влияния на данное решение и ошибка на входе на всём диапазоне (full-scale range, FSR) составляет менее 0.1%, а на выходе – менее 0.2% FSR.

 

Возможности:

  • 16-битные входы и выходы с программируемым пользователем диапазоном;
  • Программируемые каналы: каждый канал входа и выхода можно программно настроить на работу как по току, так и по напряжению;
  • Точность – входные каналы менее ±0.1% FSR при 25 °C, выходные каналы менее ±0.2% FSR при 25 °C;
  • Встроенный изолированный Flybuck™ источник питания с защитой от пусковых токов;
  • Соответствует стандарту IEC61000-4 для ESD и EFT.

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Референс дизайн, представляющий собой оценочный набор на базе дельта-сигма модулятора AMC130xс усиленной изоляцией и микроконтроллера Delfino TMS320F28377D семейства C2000. Дизайн позволяет оценить производительность измерений параметров трехфазного двигателя: ток каждой фазы, напряжение инвертора и напряжение цепи постоянного тока. Входящая в состав комплекта прошивка позволяет настроить Sinc фильтр, установить частоту PLL и получать данные с Sinc фильтра. Так же в комплект входит универсальный графический интерфейс, который поможет быстро оценить производительность AMC130x и с легкостью изменить параметры Sinc фильтра, реализованного на микроконтроллере Delfino.

 

Возможности:

  • Изолированный шунт, позволяющий измерить ток и напряжение трехфазного двигателя с помощью дельта-сигма модулятора с усиленной изоляцией AMC130x;
  • 2-ядерный микроконтроллер TMS320F28377D с реализованным на нем Sinc фильтром;
  • Калиброванная точность ±0.2%, точность без калибровки < 2%;
  • Время отклика менее 4 мкс. от коротких замыканий;
  • Графический интерфейс пользователя для полного анализа тактирования модулятора, параметров Sinc фильтра и сигналов тока и напряжения;
  • Соответствует требованиям IEC61800 по ЭМС. 

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  • Топология платы
Описание:
The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor like Sitara AM437x or Delfino F28379 to run the corresponding master protocol. Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). The TI design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.

Возможности:

Universal Hardware to Interface to EnDat 2.2, BiSS, SSI and 4-Wire or 2-Wire HIPERFACE DSL Encoders. Supports All Corresponding Standard Data Rates up to at least 100m Cable Length. 3.3-V Supply Half-Duplex RS485 Transceiver SN65HVD78 with 12kV IEC-ESD and 4kV EFT Eliminates Cost for External ESD Components. Encoder P/S with Wide Input Range (15-60V) Offers Programmable Output Voltage 5.25V or 11V, Compliant to EnDat 2.2, BiSS or HIPERFACE DSL Encoders. OV, UV and Precise Over-Current Limit with Short-Circuit Protection Leveraging TI eFuse Technology with Current Monitor and Fault Indicator. Logic Interface (3.3V I/O) to Host Processors like host processor like Sitara AM437x or Delfino F28379 to run the EnDat 2.2, BiSS, SSI or HIPERFACE DSL Master. Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). Design Exceeds EMC Immunity for ESD, Fast Transient Burst, and Surge and Conducted RF with Levels according to IEC61800-3.

Документация:
  • Схемотехника
  • BOM
Описание:
The Isolated Loop powered Thermocouple Transmitter reference design is a system solution providing precision K-type thermocouple measurements for 4 to 20-mA isolated current-loop applications. This design is intended as an evaluation module for users to fast prototype and develop end-products for process-control and factory-automation. Potential challenges with thermocouples as a temperature sensor include tiny voltage outputs, low sensitivity and nonlinearity; in addition, because in industrial environments ground potential differences higher than 100V are common, thermocouple and signal conditioning circuitry must be galvanically isolated. The design files include design considerations, block diagrams, schematics, Bill of Materials (BOM), layer plots, Altium files, Gerber Files, and MSP430 Firmware. Watch the TIDA-00349 Overview video, covering the same isolated power topology as used in the TIDA-00189 NOW

Возможности:

Sensor input compatible with k-Type Thermocouple probes ( -200°C to +1375°C) Operating temperature of the circuit -40°C to +85°C Implements Cold Junction compensation (RTD based) Front End accuracy < 0.5°C (-200°C to +270°C) and < 0.15% (270°C to +1375°C) 4 to 20mA current loop output signal Design to meet IEC 61000-4-5

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  • Схемотехника
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  • Топология платы
Описание:
The Texas Instruments bq27411-G1 reference design is an easy to configure fuel gauging solution for single series cell Li-Ion battery packs. The device requires minimal configuration and uses One Time Programmable (OTP) Non-Volatile Memory (NVM) to avoid an initialization download by the system processor. The bq27411-G1 uses the patented Impedance Track™ algorithm for fuel gauging, and provides information such as remaining battery capacity (mAh), state-of-charge (%), and battery voltage (mV).

Возможности:

Impedance Track technology Easy to configure Low BOM count Low power consumption This circuit design is tested and includes orderable EVM, User's Guide, and evaluation software.

Документация:
  • Схемотехника
  • BOM
  • Тестирование
Описание:
This power supply topology is capable of sourcing 6A via two LDOs operating in parallel. The solution sources current evenly between the two TPS74401’s, each capable of supplying 3A. This design allows for higher currents to be supplied than is typically possible with a single LDO. It also allows for additional heat syncing not available with an individual LDO.

Возможности:

Sources up to 6A High PSRR to filter ripple Low Noise output to provide a clean rail Low dropout regulation High Accuracy (1% over temperature) Soft-start allows for monotonic startup

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TIDA-00280 is an evaluation module for fully-integrated single-cell NVDC 3A charger bq24296/bq24297 with 1.5A synchronous boost operation. This board could be used to evaluate the performance of USB detection, the flexibility to change the charging profile and OTG operation. The two charger ICs are widely used in personal portable electronics including smart phone, tablets and WiFi routers.

Возможности:

Fast charging with up to 3A charging current to support high capacity battery pack Input voltage regulation (VDPM) to support third party adapters D+/D- USB detection compatible to USB BC1.2, non-standard adaptor detection 1.5A OTG with adjustable output voltage Pin-to-pin compatible to bq2419x

Документация:
  • Схемотехника
  • BOM
  • Тестирование
Описание:
TIDA-00284 proposes to integrate current control and plunger movement detection into an AC solenoid coil. This reference design provides a solution to control the solenoid current using a PWM-based controller along with a Hall sensor to detect plunger movement and switch from peak current to hold current mode Various applications in the field of industrial automation and material processing will benefit from up-to 70% reduced power consumption, accelerated process time, greatly simplified usage and enhanced monitoring capabilities.

Возможности:

PWM based current control optimizes power consumption for peak and hold time or according to fixed time settings Optional plunger movement detection based on Hall sensor Automatic switchover from peak to hold current mode at the end of completion of plunger movement or pre-set timer Activates alarm signal on detection of faulty plunger movement, under voltage or controller over temperature Complies with EN55011-Class A conducted emission limits

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Описание:
The TI Design TIDA-00289 proposes to integrate current control and plunger movement detection into the solenoid coil. Various applications in the field of industrial automation and material processing will benefit from up-to 70% reduced power consumption, accelerated process time, greatly simplified usage and enhanced monitoring capabilities.

Возможности:

PWM based current control optimizes power consumption for peak and hold time or according to fixed time settings 2 options for plunger movement detection: Back-EMF and Hall sensor based Automatic switchover from peak to hold current mode at the end of completion of plunger movement Activates alarm signal on detection of faulty plunger movement, under voltage or controller over temperature Complies with EN55011-Class A conducted emission limits

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Описание:

RS485 (изолированный, неизолированный) является популярным интерфейсом в сфере грид-инфраструктур и одной из главной опций в разрабатываемом в настоящее время оборудовании. TIDA-00308 позволяет быстро производить отладку и проводить процесс разработки с помощью устройств RS485 от TI в 3 различных случаях применения с помощью изолированного источника питания, который включён в этот проект. Кроме того, в руководстве пользователя приведены результаты испытаний данного проекта по стандартам IEC61000-4-2 (электростатический разряд) и IEC61000-4-5 (скачок напряжения).

 

Возможности:

  • В одном проекте приведены три сценария применений RS485
  • Доступны два изолированных питания, 5 В и 3,3 В
  • Статус передачи и приёма по RS485 отображается на светодиоде
  • Данный дизайн совместим со многими изолированными устройствами от TI для различных применений
  • Соответствует требованиям IEC-61000:
    • IEC-61000-4-2: электростатический разряд до 4 кВ (контакт)
    • IEC-61000-4-5: всплески напряжения до ±1 кВ
  • Нацелен на применения в качестве:
    • интерфейса с применением изолятора
    • неизолированного приёмопередатчика RS485
    • изолированного приёмопередатчика RS485

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Описание:

Это решение демонстрирует модификации платы, требуемые для приложений с поддержкой высокой пропускной способности и высокой частоты, использующий текущий источник ЦАП DAC38J84 с модулятором TRF3704. TRF3704 – это модулятор 6 ГГц, поддерживающий широкие диапазоны модуляций. DAC38J84 – это конвертер 2,5 Гвыборок/с, поддерживающий базовый диапазон 600 MГц. Комбинация облегчает работу на частотах и с пропускной способностью, которые ранее были недостижимы для высокопроизводительных систем связи.

Возможности:

  • Поддержка полосы пропускания 600 МГц, соответствующей полосы пропускания радиочастотного диапазона 1,2 ГГц;
  • Работа до 6 ГГц с хорошим коэффициентом усиления и линейностью характеристики;
  • Обеспечивает правильное преобразование сетевого интерфейса ЦАП для модулятора;
  • Обеспечивает резервирование для LPF между ЦАП и модулятором;
  • Вносит изменения для обеспечения плоской частотной характеристики ББ для приложений с высокой пропускной способностью;
  • TSW38J84 - это типовое решение с графическим интерфейсом, которое можно купить; любые изменения могут быть простестированы на этой отладочной плате.

Документация:
  • Схемотехника
  • BOM
  • Топология платы
  • Тестирование
Описание:

Применение методов выравнивания – это эффективный способ компенсирования потерь в канале передачи по последовательному интерфейсу JESD204B в преобразователях данных. В данном базовом проекте использован ADC16DX370, сдвоенный 16-битный аналого-цифровой преобразователь (АЦП) на 370 MSPS, в котором используется метод выравнивания с ослаблением для подготовки последовательных данных для передачи со скоростью 7,4 Гбит/с. У пользователя существует возможность оптимизировать ослабление (DEM) и размах выходного напряжения (VOD) выходного драйвера, чтобы эти параметры канала находились в обратно пропорциональной зависимости. Эксперименты показывают чистый приём сигнала на расстоянии 20 дюймов с использованием материала FR-4.

Возможности:

  • Позволяет добиться высокоточной работы последовательного интерфейса JESD204B с учётом использования недорогих материалов печатной платы
  • Дает возможность прийти к пониманию ограничений, которые накладывают каналы с потерями, и освоить методы выравнивания для снятия этих ограничений
  • Использовать выверенный подход к оптимизации параметров выравнивания ADC16DX370
  • Базовый проект протестирован и включает в себя отладочный модуль, конфигурационное программное обеспечение и руководство пользователя

Документация:
  • Даташит
  • Схемотехника
  • BOM
  • Топология платы
Описание:
Low cost, high performance clocking solution for GSPS data converters. This reference design discusses the use of a TRF3765, a low noise frequency synthesizer, generating the sampling clock for a 4 GSPS analog-to-digital converter (ADC12J4000). Experiments demonstrate data sheet comparable SNR and SFDR performance.

Возможности:

Frequency ranges from 300MHz to 4.8GHz Low noise VCO ~ 133dBc/Hz Low jitter: 0.35ps This reference design is tested and includes an evaluation board, configuration software and User's Guide

Документация:
  • Схемотехника
  • BOM
  • Топология платы
  • Тестирование
Описание:

Растущий спрос на беспроводные сети для обеспечения быстрой передачи данных пользователям увеличивает производительность приемопередающего оборудования для обеспечения достаточной пропускной способности и поддержки крупнейших стандартизированных несущих частот (с агрегацией частот в некоторых случаях), а также достаточную чувствительность приемника и динамический диапазон для работы в присутствии сильных блокирующих сигналов в рабочем окружении.

Это решение от TI описывает подсистему RF-приемника с 16-битным сэмплером, пропускная способность которого превышает 100 МГц, включающую понижающий микшер, цифровой усилитель с переменным коэффициентом усиления (DVGA), высокоскоростной конвейерный аналого-цифровой преобразователь (ADC), гетеродин (LO), RF-синтезатор и тактовый генератор устранения джиттера.

 

Возможности:

  • Реализует подсистему RF супергетеродинного приемника с входным диапазоном частот 700-2700 МГц, шириной полосы пропускания 100 МГц и 16-битным АЦП;
  • Ускоряет время разработки беспроводной связи, программного обеспечения для радио, военных или тестово-измерительных приложений с проверкой IF сигналов цепи;
  • Оценить этот дизайн легко с поддержкой сбора данных и инструментов анализа;
  • Эта конструкция протестирована и включает оценочный модуль (EVM), приложение для настройки и руководство пользователя.

Документация:
  • Схемотехника
  • BOM
  • Топология платы
  • Тестирование
Описание:
The TIDA-00363 TI design provides a solution for EMC-compliant resolver-to-digital converter (RDC) with single-chip PGA411-Q1 with 12-bit angle resolution. PGA411-Q1's integrated boost-converter and exciter amplifier reduces system cost and board space compared to traditional RDC solutions. On-chip protection and diagnostic improve robustness against short-circuit and increase safery by detecting external fault conditions. A high-speed 3.3V SPI interface allows PGA411-Q1 configuration, diagnostics, angle and velocity information. Example firmware on a C2000 MCU allow for easy real-time evaluation of the TI design with angle data available at 16kHz sample rate for angle data read-out and register configuration through virtual COM port.
Возможности:

Single-chip resolver-to-digital converter (RDC) with typical accuracy better than ±0.2 degree Exceeds IEC61800-3 EMC immunity ±8kV ESD CD per IEC61000-4-2 ±4kV EFT per IEC61000-4-4 ±2kV Surge per IEC61000-4-5 Integrated exciter amplifier with 150mA output current and programmable (1-017V) boost power supply enables 60% PCB size reduction 24V input with wide input voltage range (12-42v/60V) and reverse polarity protection SPI interface (8MHz, 3.3V I/O). Parallel and ABZ/UVW output interface Option to use external 15-V exciter supply and/or external exciter amplifier Example firmware with C2000 MCU to read angle at 16kHz sample rate

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The TIDA-00368 reference design provides a reference solution for interfacing current output Hall sensors and current transformers to differential ADC (standalone and integrated into MCU). The differential signal conditioning circuit is designed to measure motor current with an accuracy of ±0.5% across operating temperature range from -25°C to +75°C. The output common-mode voltage of the differential amplifier can be selected to either 1.25V or 2.5V.

Возможности:

On board current-output Hall sensor to measure nominal current up to 25A RMS Current measurement accuracy of 0.5% Common reference solution for interfacing both CT and current output hall sensor with Pseudo-differential ADC/MCU Selectable output common-mode voltage for the differential amplifier Provision to evaluate with Delfino F2837x Control Card Provision to evaluate with external ADC (ADS8354) for interfacing with Motor Controller

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TIDA-00374 – референс-дизайн, использующий наномощный таймер Texas Instruments, ультрамалопотребляющую беспроводную микроконтроллерную платформу SimpleLink™ и технологию зондирования влажности для демонстрации сверхнизкого потребления при использовании определенной скважности в работе датчиков конечных узлов. Использование этих технологий ведет к экстремально долгой длительности жизни батарей: более 10 лет при использовании стандартной литиевой дисковой батареи CR2032. TI дизайн включает в себя технологии проектирования систем, детальные результаты тестов, а также другую необходимую информацию по проекту.

Возможности:

Возможности:

  • Использование наномощного системного таймера для периодического с определенной скважностью получения результатов измерений, что позволяет использовать стандартные литиевые батареи более 10 лет
  • Настраиваемый интервал пробуждения системы
  • Экстремально низкий остаточный ток (183 nA в течение 59.97 sec.)
  • Ультранизкий ток в открытом состоянии благодаря низкой активности процессора и малым токам радиопередачи (4.04 mA в течение 30 ms)
  • Точность измерений относительной влажности ±2%
  • Точность измерения температуры ±0.2°C

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  • Топология платы
Описание:
The C2000 Delfino microcontrollers' demand for a tight tolerance on both of its supply rails; this supervisory topology is designed to monitor the two voltage rails and assert a reset when either rail is not within its threshold. The two supervisors will monitor for both undervoltage and overvoltage conditions on each voltage rail; this layout is also less prone to asserting nuisance resets due to the user selectable options on the TPS3702 product family.

Возможности:

High Threshold Accuracy Threshold adjustable through SET pin Internal Hysteresis: 0.55%, 1.0%

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Базовый проект TSW38J84 EVM представляет собой платформу для демонстрации решения двухканального передатчика с интегрированным резонатором. В данном базовом проекте используется устройство 2.5 GSPS DAC38J84 с высококлассными модуляторами: TRF3722 (с интегрированными PLL/ VCO) и TRF3705. TRF3722 и TRF3705 можно объединить для создания двухканального решения, в котором TRF3722 будет выступать в роли локального резонатора (LO) для обоих модуляторов. Интерфейс связи между DAC38J84 и модуляторами, а также методы измерения характеристик совместной работы ЦАП и модуляторов могут варьироваться. Приведённые результаты измерений включают в себя измерения полосы пропускания, выходной точки пересечения третьего порядка, искажения гармоник и подавления частот за пределами полосы пропускания.

Возможности:

  • Полноценное решение двухканальной передачи «биты-РЧ» и использованием интерфейса JESD204B
  • Платформа для тестирования 2.5 GSPS DAC38J84 с двумя высококлассными модуляторами
  • Выходная частота TRF3722 и TRF3705 достигает 4 ГГц
  • Решение с поддержкой полосы пропускания до 1 ГГц
  • Решение двухканальной передачи для современных систем связи, военного назначения и контрольно-измерительных приборов

Документация:
  • Схемотехника
  • BOM
  • Топология платы
Описание:
The TIDA-00419 TI Design is a demonstration of a SONAR receive path sub-system using the integrated analog front end (AFE) AFE5809. The AFE5809 features 8 channels of analog signal conditioning (LNA+VCAT+PGA) and Digital Processing (ADC+Digital Demodulator) that brings a high level of system receive path integration and enables high-performance echo-location imaging for high-end SONAR systems. This reference design demonstrates this SONAR sub-system with a schematic modified from the AFE5809EVM. The test data included is taken by combining the full AFE5809EVM with the TSW1400EVM FPGA Capture Card and their respective Software GUIs in order simulate a complete receive chain solution capable of high-performance measurement.

Возможности:

Capable of measuring SONAR signals from 30kHz-32.5MHz Digital Demodulator for envelope detection and beamforming Variable Sample frequency 10-65MSPS with external clock capability Variable Gain settings with a -4dB to 54dB range Variable input impedance settings This design is tested and provides design reference materials including Schematics, and BOM.

Документация:
  • Схемотехника
  • BOM
  • Топология платы
Описание:

Широкополосные радиочастотные приемники позволяют значительно расширить возможности радиоаппаратуры. Широкая полоса пропускания позволяет гибко настраивать каналы без внесения изменений в аппаратную часть, а так же принимать несколько каналов на разных частотах одновременно.

Данное типовое решение – широкополосный радиочастотный приемник с АЦП с частотой дискретизации 4 Гвыб./с, дифференциальным усилителем с частотой пропускания от 0 до 8 ГГц. Данный дифференциальный усилитель позволяет работать с низкочастотным сигналом, вплоть до постоянного тока, что невозможно при использовании согласующего трансформатора.

 

Возможности:

  • Типовое решение с полосой пропускания 2 ГГц
  • Поддерживает работу с постоянным током
  • Поддерживает несимметричный и дифференциальный вход
  • Решение включает в себя полноценную систему тактирования и питания

Документация:
  • Схемотехника
  • BOM
Описание:
This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown for each EVM. The FPGA firmware is described and the relevant Xilinx IP block configuration parameters are shown. Data taken on the actual hardware is shown and analyzed, showing synchronization within 50 ps without characterized cables or calibrated propagation delays.

Возможности:

Demonstrates a typical phased array radar sub-system by showing synchronization of JESD204B giga-sample ADCs The LMK04828 clocking solution used is described in detail Test results show synchronization within 50 ps without any characterization of cables or calibration of propagation delays Xilinx firmware development is discussed to offer a clear understanding of the requirements This sub-system is tested and includes example configuration files

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The TIDA-00445 TI design provides a reference solution for isolated current measurement using shunt and isolated amplifier. By limiting the shunt voltage to 25mV, this design is able to reduce power dissipation in the shunt and achieves a high current measurement range of up to 200A. Shunt voltage is further amplified by precision Opamps in instrumentation amplifier based configuration with a gain of 10 to match the input range of isolation amplifier. The output of isolation amplifier is level shifted and scaled to utilize the complete input range of 3.3v ADC. This design uses free running transformer driver for generating isolated supply voltage for the high voltage side of the circuit. Small form factor for the power supply is achieved by the operation of driver at 400 KHz.

Возможности:

Shunt based isolated 200Apk current measurement solution Limiting shunt voltage to 25mV helps achieving less power dissipation High-Side Current Sense Circuit With High Common Mode Voltage of 1200 V peak Supporting up to 690V AC Mains Powered Drives Calibrated AC accuracy of <1% across temperatures -25Лљc to +85Лљc Can be Interfaced directly with differential or single ended ADC Small form factor push pull based isolated power supply to power high side circuit Inbuilt 1.65VREF for level shifting the output.

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TIDA-00465 is an application using TPS23861 as a single port, type 2, PoE auto-mode PSE in a small form factor. The design will inject power onto any Ethernet cable for PoE powered loads up to 30W.

Возможности:

TPS23861 IEEE 802.3at PSE Controller Single Port 30W PoE Injector Auto Detection and Classification of PD Auto Turn on and Disconnect of PD Requires only 48VDC, 40W AC-DC Adapter

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A common technique to estimate the position of emitters uses the amplitude and phase shift data of a signal derived from an array of spatially distributed sensors. For such systems, it is important to guarantee a deterministic phase relationship between the sensors to minimize errors in the actual measured data. Thisapplication design will discuss how multiple Analog to Digital Converters (ADCs) with a JESD204B interface can be synchronized so that the sampled data from the ADCs are phase aligned.

Возможности:

Synchronized 2 giga sample ADCs sampling at 3.072GHz System expandable to more than 2 ADCs Phase variation less than 1 ADC clock period Easy to use software interface for control and data acquisition Excellent spur and noise perfromance of ADC at 3.072GHz This design is tested and includes software, demo hardware and a design guide.

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The TIDA-00468 Reference design shows how to build an isolated thermocouple sensing front-end with optimized power-consumption for loop powered application while: • reducing footprint from classical look-up table approach and • keeping the fast response time of linear piece wise interpolation

Возможности:

Sensor Input: K-Type Thermocouple Temperature range:-270..1372 C System accuracy: +/- 0.2K Piecewise linear interpolation Look-up table size: 320 bytes

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The ADC12D1600RFRB reference design provides a platform to demonstrate a high speed digitizer application which incorporates clocking, power management, and signal processing. The reference design utilizes the 1.6 GSPS ADC12D1600RF device, onboard FPGA Xilinx Virtex 4, and high performance clock synthesizer LMX2531 to meet the system requirements of a 9 bit ENOB high speed digitizer.

Возможности:

2 Channels of GSPS analog-to-digital conversion Greater than 9 bits ENOB over wide input frequency range Protoype for low cost dual channel high speed digitizer for test and measurement systems

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This board allows the LMH5401 to be used as a low gain amplifier or as an attenuator.

Возможности:

DC coupled Minumum gain of 0.5V/V Split Supply voltage 6 GHz Bandwidth

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The TIDA-00531 reference design features dynamic voltage scaling (DVS) as a power management solution to power CPU/DSP core voltages.

Возможности:

Programable Output Voltage from 1.2 V to 1.6 V With 90 Steps in Between Output Voltage is Programable Through Standard I2C Interface Output Voltage Enable and Disable function High power supply ripple rejection Up to 800-mA Output Current This circuit design is tested and includes a detail design guide, test data and design files

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The TIDA-00534 reference design provides guideline and test data of a cost effective small size power solution to power the main 3.3V voltage rails of the CC3200 wireless MCU or any other noise sensitive system from a 5V voltage source.

Возможности:

Power management solution for noise sensitive systems with wireless capabilities. Provides 3.3V clean voltage supply from a 5V power rail (i.e. battery, USB connector, Power over coaxial). Low current to ground during load standby (50μA typical). 50dbs input ripple rejection at 100 kHz noise frequency and maximum load current. Great load transient response. Better than 5% output voltage transient from 1mA to 250mA load current change. Small foot print; area smaller than 31.7 mm2

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BQ25892 - это высокоинтегрированый контроллер для управления зарядкой одного Li-Ion или Li-polymer элемента и для управления питанием широкого спектра портативных устройств с USB или высоковольтным адаптером питания. Низкое сопротивление питающих цепей позволяет добиться оптимальной работы устройства, ускоряет процесс зарядки и продлевает время работы от аккумулятора в процессе разрядки. Интерфейс I2C позволяет настроить параметры зарядки аккумулятора и системные параметры, что делает данное решение реально гибким.

 

Возможности:

  • Поддерживает высоковольтный адаптер питания для получения тока зарядки до 5 А;
  • Высокоинтегрированное решение с высокой эффективностью работы;
  • Оптимизация входного тока (Input Current Optimizer, ICO) для эффективного использования адаптера питания;
  • АЦП для мониторинга системы и батареи;
  • Встроенный полевой транзистор с низким сопротивлением открытого канала для продления времени работы аккумулятора.

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This design is a 9.8-GHz wideband, low-phase noise, integrated continuous wave (CW) RF signal generator with versatile spur reduction technique. The output level can be programmed from -32 dBm to 14.5 dBm in 0.5-dB steps. This signal generator can be used as local oscillator for applications, such as analog and vector signal generator, and can also be used as a clock generator for RF ADCs. The TIDA-00626 can be controlled from any PC via the TI USB2ANY interface and also using the microcontroller MSP430F5529 launch pad.
Возможности:

Integrated wideband frequency synthesizer with output range of 0.02 GHzto 9.8 GHz Excellent phase-noise performance; synthesizer phase noise at 6 GHz, -110 dBc/Hzat 100-KHz offset, -132 dBc/Hzat 1-MHz offset Low-noise synthesizer, in-band spurs (-75 dBc) Programmable output level 14.5 dBm to -32 dBm, 0.5-dB steps Versatile boundary spurs reduction using LMK61E2

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A wideband single-ended to differential conversion reference design in both DC- and AC- coupled applications is presented. The design evaluates the performance of the LMH5401 and LMH6401 cascade and offers insight into the design.

Возможности:

4.5GHz bandwidth with 30dB maximum total voltage gain Digitally-controlled gain range of 32dB in 1dB steps 50-Ω Input DC- or AC-coupled single-ended to differential conversion Output IP3 at RL = 200Ω: 40dBm at 500MHz 33dBm at 1GHz Output common-mode control capability: VMID ±0.5V Compact design ideal for portable application with PD = 645mW

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This board cascades two LMH5401 or LMH3401 amplifiers for more gain or more DC common mode shift.

Возможности:

DC coupled Two LMH5401 (0r 3401) amplifiers Independent supplies for each amplifier Up to 8 GHZ Bandwidth Gain to 20dB or higher Single or split supply

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A low THD+N amplifier signal chain for driving headphones is presented. The design walks through various factors to consider in order to optimize performance based on customer needs.

Возможности:

Ultra-low distortion, THD+N < 0.0003% Low power consumption, 18.25mW/channel Ability to drive 50mW of output power into 32W headphone load without sacrificing performance Compact design ideal for portable application Low-power mode to save power in portable applications The circuit performance is thoroughly whetted and includes the entire amplifier singal-chain and a design guide that walks the user throguh various options to consider when designing a headphone amplifier

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Референс дизайн, реализовывающий законченный 120 МГц широполосный оптический фронт-энд, заключающий в себе высокоскоростной трансимпедансный усилитель, дифференциальный усилитель и высокоскоростной 14-битный АЦП 160 MSPS с интерфейсом JESD204B. Дизайн включает в себя все необходимое программное и аппаратное обеспечение для оценки производительности системы по отклику на высокоскоростные оптические импульсы, генерируемые лазерным драйвером и диодом для решений, включающих оптическую временную рефлектометрию.

 

Возможности:

  • Оптический фронт-энд с демонстрацией производительности системы;
  • Высокоскоростная сигнальная часть с полосой пропускания более 120 МГц;
  • Высокоскоростной трансимпедансный усилитель для преобразования тока в напряжение, а также дифференциальный усилитель, управляющий высокоскоростным 14-битным АЦП;
  • Драйвер сверхбыстрого лазерного светодиода и лазерный светодиод для генерирования сигнала Tx;
  • Фронт-энд на основе лавинного фотодиода с высоковольтным источником питания на борту;
  • Гибкость и простота замены компонентов в оптической части, усилителе и АЦП.

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The TIDA-00783.1 reference design is a triple output wide Vin power module design. It provides 3.3V, 1.8V and 1.2V output, at 6W total power. The layout is optimized for space constrained applications.

Возможности:

LMZ36002 wide Vin power module with integrated inductor, 4.5V to 60V input, 2A output LMZ20502 nano module with integrated inductor 4.5V to 40V wide input range Power module design with minimum external components 400 sq. mm compact solution size This circuit board is tested, and the design files and test report are included

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The TIDA-00793 reference design provides a simple, robust, and accurate sensor signal conditioning solution using the PGA301-Q1 for resistive bridge type pressure sensors. The protection strategies implemented in this design protect the pressure sensor against wiring harness faults, EMI, and automotive electrical transients. Theory, operation, and challenges involved in the design are systematically explained in the design guide.

Возможности:

Accuracy of 0.17% Over Temperature (-40°C to 125°C) Second Order Temperature and Linearity Compensation Algorithm Form Factor Design of 23x23mm Protection Against Harness Faults (Over voltage and Reverse Polarity Protection), Broken Wire Detection Meets ISO7637-3 Requirements for Transient Pulses, tested for Bulk Current Injection (BCI)-ISO11452-4

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Modern high-speed data acquisition systems push for higher bandwidth while delivering state of the art performance. Next generations systems require instantaneous bandwidths beyond 1GHz to cover new emerging communications standards such as 802.11 ac and 5G for example. To achieve wider bandwidths a dual ADC is used as a complex (IQ) receiver in 0-IF type architecture. Performance considerations are avoiding IQ mismatch and imbalances and therefore make the I and Q paths symmetrical. This TI design describes a 2GHz wide band digitizer consisting of a dual RF ADC driver and a dual channel 14bit 3Gsps ADC with the necessary analog filter network. This design captures 2GHz of frequency spectrum at RF first with a wide bandwidth IQ demodulator and then amplifies, filters, and samples the two complex frequency bands at baseband, dc-1 GHz.

Возможности:

Optimal method for digitizing 2GHz or greater of signal bandwidth DC Coupled signal path utilizing LMH3404 amplifier Optimzed low jitter clocking solution utilizing LMX2592 and LMK04828

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A direct RF sampling receiver approach to a radar system operating in S-band is demonstrated using the ADC32RF45, 3-Gsps, 14-bit analog to digital converter (ADC). RF sampling reduces the complexity of a system by removing down conversion and using a high sampling rate enables wider signal bandwidths. The approach is demonstrated by building a receiver based on the ASR-11 air traffic control radar specifications.
Возможности:

S-band radar reference design using RF sampling architecture Example lineup analysis with RF sampling ADC Measurements to verify calculated performance Radar specific measurements with detection scheme Supports greater than 1-GHz instantaneous signal bandwidth

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This reference design discusses the use and performance of the Digital Variable-Gain high-speed amplifier, the LMH6401, to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and measued, including AC-coupling and DC-coupling, to meet the requirements of a variety of applications.

Возможности:

Low noise Variable Gain Amplifier Dual High Speed ADC AC and DC coupling Complete clocking solution Tested Reference design that includes an evaluation board, configuration software, and User's Guide

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This reference design discusses the use and performance of the Ultra-Wideband, Fixed-gain high-speed amplifier, the LMH3401 to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and measued, including AC-coupling and DC-coupling, to meet the requirements of a variety of applications.
Возможности:

Low noise, 16-dB Gain Amplifier Dual High Speed ADC AC and DC coupling Complete clocking solution Tested Reference design that includes an evaluation board, configuration software, and User's Guide

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The TIDA-00976 TI Design is a high-speed current-to-voltage circuit. This design is optimized for current-sense applications that require high-speed current measurements in the positive supply rail for voltages from 5 to 30 V. This design will reduce the common-mode voltage from 30 V and produce an output voltage centered at 2.5 V for sampling with an analog-to-digital converter (ADC). The output common mode can be easily changed by using different precision references.
Возможности:

Bandwidth > 15 MHz Convert Current-to-Voltage High-Side Voltage Range from 5 to 30 V Flexible Output Common-Mode Voltage

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This reference design implements an IF subsystem for a standard wireless signal tester with an active balun-amplifier (LMH5401), LC bandpass filter, 16-bit ADC (ADC31JB68) and clock cleaner and generator PLL (LMK04828). Measurements using modulated signals demonstrate reception of the signal with high constellation clarity and MER sufficient for testing a wide variety of standard signal types including 802.11ac (Wi-Fi), Bluetooth, Zigbee, and the common cellular standards like UMTS and LTE.
Возможности:

Implements an IF Subsystem for Standard Wireless Signal Tester With 160-MHz Bandwidth Support for Most Standard Wireless Signal Data Types

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To further increase the range, data rate, and reliability of modern mobile communications systems, system designers continue to place more emphasis on multiple-antenna transmitter systems to achieve combinations of spatial diversity and spatial multiplexing. Such implementations can further compensate for path loss and the multipath effect of transmission mediums. These implementations can also potentially increase range and data rate and improve reliability. Multiple-antenna systems with beamforming techniques also allows for better focus of transmitter energy and the system can potentially reduce the size of an antenna while increasing the transmitter range. More mobile communications systems and radar systems are starting to adopt multiple-antenna transmitters in their designs. For such multiple-antenna transmitter implementations, each individual transmitter requires digital-to-analog converters (DACs) for the digital bits to RF transmission. Multiple transmitters and the associated antenna must also be synchronized in time. The design may utilize JESD204B subclass 1 type DAC3xJ8x, which has the capability to achieve multiple DAC3xJ8x device synchronization. The DAC3xJ8x is a high-speed 16-bit DAC with up to 2.8 GSPS of sample rate. All of the capabilities of DAC3xJ8x simplify device synchronization and facilitate the design of a multiple-antenna transmitter system.

Возможности:

High-Speed Data Transfer High Sample Rate Digital-to-Analog Conversion JESD204B Subclass 1 Support Multi-Device Synchronization Synchronized Clock Distribution

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Many products are now becoming connected through the Internet of Things (IoT), including test equipment such as digital multimeters (DMM). Enabled by Texas Instruments’ SimpleLink™ ultra-low power wireless microcontroller (MCU) platform, the TIDA-01012 reference design demonstrates a connected, 4½ Digit, 100kHz true RMS, DMM with Bluetooth® low energy connectivity, NFC Bluetooth pairing, and an Automatic Wake-Up feature enabled by TI’s CapTIvate™ technology.
Возможности:

4 1/2 digit, 50K count resolution Wireless MCU enabling bluetooth low energy (BLE) for IoT wireless Automatic wake-up enabled by CapTIvate capacitive touch technology Low power design and power management systems BLE mobile app pairing enabled by NFC dynamic interface Firmware-based true RMS measurements

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The TIDA-01015 is a clocking solution reference design for high speed direct RF sampling GSPS ADCs. This design showcases the significance of the sampling clock to achieve high SNR for 2nd Nyquist zone input signal frequencies. ADC12J4000 is a 12-bit, 4-GSPS RF sampling ADC with 3-dB input bandwidth of 3.2 GHz capable of capturing signals up to 4 GHz. This design highlights a clocking solution for the ADC12J4000 using TRF3765, to achieve high SNR performance at high input frequencies used in applications such as digital storage oscilloscopes (DSO) and wireless testers.
Возможности:

12-bit, 4-GSPS RF sampling ADC clocking solution Up to 4-GHz input signal capture capability JESD204B compliant low-phase noise clocking solution for RF sampling ADC

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TIDA-01016 is a clocking solution for high dynamic range high speed ADC. RF input signals are directly captured using the RF sampling approach by high speed ADC. TheADC32RF45 is a dual- channel, 14-bit, 3-GSPS RF sampling ADC. The 3-dB input bandwidth is 3.2 GHz, and it captures signals up to 4 GHz. This design showcases the clocking solution using the LMX2582, to achieve the best SNR performance of ADC32RF45 at higher input frequencies used in microwave backhaul applications.
Возможности:

3 GHz low-phase noise clocking solution for RF sampling ADC with >51 dB SNR @ 3.65 GHz input 4GHz high frequency input signal capture capability Large signal bandwidth, high dynamic range RF sampling receiver solution

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The TIDA-01017 reference design demonstrates the performance of a clocking solution for a high speed multi-channel system, analyzed by measuring the channel to channel skew for the entire input frequency range of the RF sampling ADC. Channel to channel skew is critical for phased array radar and oscilloscope applications. The ADC12J4000 is a low power, 12-bit, 4-GSPS RF-sampling analog to digital converter (ADC) with a buffered analog input, integrated digital down Converter, features a JESD204B interface, and it captures signals up to 4GHz. This design showcases the clocking solution using the LMK04828, to achieve the synchronization between multiple ADC12J4000 signal chains using synchronized SYSREF.
Возможности:

Synchronization of multi-channel high speed ADCs RF sampling ADC clocking solution 4GHz high frequency input signal capture capability Low-phase noise clocking solution for RF sampling ACC

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High speed multi-channel applications require precise clocking solutions capable of managing channel-to-channel skew in order to achieve optimal system SNR, SFDR, and ENOB. This reference design is capable of supporting two high speed channels on separate boards by utilizing TI’s LMX2594 wideband PLL with integrated VCOs to generate a 10 MHz to 15 GHz clock and SYSREF for JESD204B interfaces. The 10 KHz offset phase noise is < -104 dBc/Hz for a 15 GHz clock frequency. By using TI’s ADCDJ3200 high speed converter EVMs, a board-to-board clock skew of <10ps is achieved and a SNR of 49.6 dB with a 5.25 GHz input signal. All key design theories are described, guiding users through the part selection process and design optimization. Finally, schematic, board layout, hardware testing, and results are also presented.
Возможности:

Up to 15GHz sample clock generation Multi-channel JESD204B compliant clock solution Low phase noise clocking for RF sampling ADC/DAC Configurable phase synchronization to achieve low skew in multi-channel system Supports TI’s high-speed converter and capture cards (ADC12DJ3200EVM, TSW14J56 / TSW14J57)

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